There is known a technique referred to as a power gating that interrupts a power supplied to a predetermined circuit node in order to reduce a power consumption of a semiconductor device (for example, refer to Japanese Laid-Open Patent Publication No. 2008-300696).
In order to perform the power gating on a power supplied from a plurality of power supplies having different voltage values, a controlling part for controlling the power gating must be provided to each of the power supplies, which results in an increase in a power consumption of semiconductor devices in proportion to the number of controlling parts.
Thus, it is desirous to use a semiconductor device having lower power consumption when performing the power gating on a power supplied from a plurality of power supplies having different voltage values.